v2716
Gerstep/cybosv2716Sep 15, 2026by github-actions[bot]
Upgrading?
AI Summary
Adds support for the Realtek RTL8721Dx RAC1 chip by implementing bounded CSI (Channel State Information) ingestion into the main branch.
Key Highlights
- Adds RTL8721Dx RAC1 CSI ingestion
- Implements bounded CSI ingest
- Integrates upstream Realtek CSI changes
New Features
- RTL8721Dx RAC1 CSI support
Full Release Notes
Automated release from CI pipeline **Changes:** Merge pull request #1944 from ruvnet/codex/realtek-csi-upstream-main Add bounded RTL8721Dx RAC1 CSI ingest to current main **Docker Image:** `ghcr.io/ruvnet/RuView:45fc41ac4cb4fae4310e76351bcac2469101608b`
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