ruvllm_sparse_attention-v0.1.1
weaviate/Verbaruvllm_sparse_attention-v0.1.1May 7, 2026by ruvnet
AI Summary
Introduces support for bare-metal ESP32 hardware and optimizes attention mechanisms to near-linear complexity using FastGRNN gates.
Key Highlights
- Bare-metal support verified on ESP32-S3 hardware
- FastGRNN salience gate reduces attention cost from O(N log N) to O(N)
- New `forward_gated` public API for recurrent salience pass
- Comprehensive `no_std` support with `libm 0.2` integration
New Features
- FastGrnnGate and forward_gated public API
- no_std feature support for bare-metal targets
- libm 0.2 integration for math functions in no_std mode
Full Release Notes
## What's new
`ruvllm_sparse_attention` v0.1.1 is the first release that runs on bare-metal ESP32-class hardware **and** drops attention's per-token cost from `O(N log N)` to near-linear `O(N)` via a FastGRNN salience gate.
📦 [crates.io](https://crates.io/crates/ruvllm_sparse_attention/0.1.1) · 📚 [docs.rs](https://docs.rs/ruvllm_sparse_attention/0.1.1) · 🧪 [tutorial gist](https://gist.github.com/ruvnet/790214c832928d6f2ec7ebe593bb3def) · 📋 [PR #429](https://github.com/ruvnet/RuVector/pull/429)
### Highlights
- **`FastGrnnGate` + `forward_gated` (new public API)** — recurrent O(N · D_h²) salience pass + gated attention forward. Combined cost `O(N · (D_h² + W + G + K_keep + dim))` is linear in seq when `K_keep` is constant. Critical invariant: `forward_gated` with all-true mask is **bit-identical** to `forward`.
- **`no_std` + `alloc` support (ADR-192)** — new `std` feature default-on, so existing consumers see zero behavioural change. Bare-metal targets opt out via `default-features = false`. **Verified on attached ESP32-S3** (Xtensa LX7 @ 240 MHz, 16 MB flash) — release build `1.02 s`, **376 KB rlib**.
- **ADR-191 (proposed)** — Pi Zero 2W production hardening: decode-deadline API, warm-up hook, `pi_zero_2w()` config preset.
- **Plain-language README** with FAQ, scaling table, and SEO keywords. New end-to-end tutorial.
- **`libm 0.2`** added as always-on dep (~60 KB pure Rust). Restores `f32::exp/sqrt/tanh/powi` method syntax in no_std mode via an `F32Ext` trait — all 46 math call sites unchanged.
### Verification matrix
| Build | Result |
|---------------------------------------------------------------------------|---------------------------------------|
| `cargo test --lib` | **38/38 pass** |
| `cargo build --no-default-features` | clean |
| `cargo build --no-default-features --features fp16` | clean |
| `cargo +esp build --release --target xtensa-esp32s3-none-elf -Z build-std=core,alloc` | clean (1.02 s, 376 KB rlib) |
| Native run of `examples/esp32s3_smoke` | `esp32s3_smoke: all checks passed` |
### Migration
Zero action for std consumers — `std` is the default feature. New no_std consumers (ESP32 / Cortex-M / RISC-V MCU):
```toml
ruvllm_sparse_attention = { version = "0.1.1", default-features = false, features = ["fp16"] }
```
Bring your own allocator + panic handler + `#[entry]` (`embedded-alloc`, `linked_list_allocator`, `esp-hal`, `xtensa-lx-rt`).
### What's next
- ADR-191 implementation (decode-deadline API, warm-up hook, Pi Zero 2W preset)
- Flash-able example app crate (`embedded-alloc` + `esp-hal` scaffolding around `examples/esp32s3_smoke.rs`)